1. Field of the Invention
The present invention relates to a process controller, a process control method, and a computer-readable recording medium.
2. Related Background Art
Recent advances in semiconductor manufacturing technologies have been remarkable, and semiconductor devices sized at a minimum processing dimension of 65 nm are mass-produced. Such miniaturization is enabled by significant progresses in micropattern forming technologies such as a mask process technology, a photolithographic technology and an etching technology.
When the size of a pattern was great enough, a planar shape of an LSI pattern to be formed on a wafer was drawn as it is as a design pattern, a mask pattern faithful to the design pattern was created, the mask pattern was transferred onto the wafer by a projection optical system, and a foundation was etched, such that a pattern substantially conforming with the design pattern could be formed on the wafer.
However, it is becoming more and more difficult to improve mass production yield along with the advance in the miniaturization of patterns.
In order to improve the mass production yield, various methods have been employed. For example, technologies called optical proximity correction (OPC) and process proximity correction (PPC) are used to faithfully transfer a design pattern onto a wafer in a lithographic step. However, there are various design patterns. Even if patterns are subjected to the OPC or PPC, there are patterns (hereinafter referred to as “dangerous patterns”) including parts (hereinafter referred to as “dangerous points”) that may not satisfy a required specification due to a small lithography margin after transfer to the wafer. Identifying such a dangerous pattern after actually transferred onto the wafer is disadvantageous to the development of the mass production of semiconductor devices. Thus, it is important to previously take measures for dangerous patterns such as by running a lithography simulation on the basis of design data to find the dangerous patterns at the stage of development. To this end, various methods have been proposed (e.g., Japanese laid open (kokai) 2004-030579 and Japanese laid open (kokai) 2007-057948).
However, the methods according to the prior arts do not take into account the fact that there are a plurality of semiconductor manufacturing apparatuses for mass production development at the time of the extraction of dangerous patterns. Design data and a process condition set for semiconductor devices to be produced do not necessarily precisely conform to the semiconductor manufacturing apparatuses used in production. It is even more obvious that a deviation from a set process condition is greater in the whole production line when there are a plurality of manufacturing apparatuses used.
Thus, the prior arts disadvantageously lack robustness against the deviation from the process condition in the production of semiconductor devices.